Apply hekate 5.2.1 and gcc 10 changes, -fno-inline
This commit is contained in:
shchmue
parent
a5fe954ce7
commit
64d7e5cebd
64 changed files with 4676 additions and 3360 deletions
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@ -18,6 +18,7 @@
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#include <string.h>
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#include "sdmmc.h"
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#include "mmc.h"
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#include "nx_sd.h"
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#include "sd.h"
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#include "../../common/memory_map.h"
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#include "../gfx/gfx.h"
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@ -135,10 +136,12 @@ static int _sdmmc_storage_check_status(sdmmc_storage_t *storage)
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static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out, u32 sector, u32 num_sectors, void *buf, u32 is_write)
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{
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u32 tmp = 0;
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sdmmc_cmd_t cmdbuf;
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sdmmc_req_t reqbuf;
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sdmmc_init_cmd(&cmdbuf, is_write ? MMC_WRITE_MULTIPLE_BLOCK : MMC_READ_MULTIPLE_BLOCK, sector, SDMMC_RSP_TYPE_1, 0);
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sdmmc_req_t reqbuf;
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reqbuf.buf = buf;
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reqbuf.num_sectors = num_sectors;
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reqbuf.blksize = 512;
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@ -148,7 +151,6 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out
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if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, blkcnt_out))
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{
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u32 tmp = 0;
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sdmmc_stop_transmission(storage->sdmmc, &tmp);
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_sdmmc_storage_get_status(storage, &tmp, 0);
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@ -171,25 +173,42 @@ int sdmmc_storage_end(sdmmc_storage_t *storage)
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static int _sdmmc_storage_readwrite(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf, u32 is_write)
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{
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u8 *bbuf = (u8 *)buf;
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bool first_reinit = false;
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while (num_sectors)
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{
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u32 blkcnt = 0;
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//Retry 9 times on error.
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u32 retries = 10;
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// Retry 5 times if failed.
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u32 retries = 5;
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do
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{
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reinit_try:
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if (_sdmmc_storage_readwrite_ex(storage, &blkcnt, sector, MIN(num_sectors, 0xFFFF), bbuf, is_write))
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goto out;
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else
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retries--;
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msleep(100);
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msleep(50);
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} while (retries);
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// Disk IO failure! Reinit SD Card to a lower speed.
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if (storage->sdmmc->id == SDMMC_1)
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{
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int res;
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if (!first_reinit)
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res = sd_initialize(true);
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else
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res = sd_init_retry(true);
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retries = 3;
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first_reinit = true;
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if (res)
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goto reinit_try;
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}
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return 0;
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out:;
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out:
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DPRINTF("readwrite: %08X\n", blkcnt);
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sector += blkcnt;
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num_sectors -= blkcnt;
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@ -201,12 +220,34 @@ DPRINTF("readwrite: %08X\n", blkcnt);
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int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
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{
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return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0);
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// Ensure that buffer resides in DRAM and it's DMA aligned.
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if (((u32)buf >= DRAM_START) && !((u32)buf % 8))
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return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0);
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if (num_sectors > (SDMMC_UP_BUF_SZ / 512))
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return 0;
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u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER;
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if (_sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 0))
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{
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memcpy(buf, tmp_buf, 512 * num_sectors);
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return 1;
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}
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return 0;
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}
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int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
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{
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return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1);
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// Ensure that buffer resides in DRAM and it's DMA aligned.
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if (((u32)buf >= DRAM_START) && !((u32)buf % 8))
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return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1);
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if (num_sectors > (SDMMC_UP_BUF_SZ / 512))
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return 0;
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u8 *tmp_buf = (u8 *)SDMMC_UPPER_BUFFER;
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memcpy(tmp_buf, buf, 512 * num_sectors);
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return _sdmmc_storage_readwrite(storage, sector, num_sectors, tmp_buf, 1);
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}
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/*
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@ -401,7 +442,7 @@ static int _mmc_storage_enable_HS(sdmmc_storage_t *storage, int check)
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if (check && !_sdmmc_storage_check_status(storage))
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return 0;
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if (!sdmmc_setup_clock(storage->sdmmc, 2))
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if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS52))
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return 0;
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DPRINTF("[MMC] switched to HS\n");
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@ -418,10 +459,10 @@ static int _mmc_storage_enable_HS200(sdmmc_storage_t *storage)
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if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS200)))
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return 0;
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if (!sdmmc_setup_clock(storage->sdmmc, 3))
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if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS200))
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return 0;
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if (!sdmmc_config_tuning(storage->sdmmc, 3, MMC_SEND_TUNING_BLOCK_HS200))
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if (!sdmmc_tuning_execute(storage->sdmmc, SDHCI_TIMING_MMC_HS200, MMC_SEND_TUNING_BLOCK_HS200))
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return 0;
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DPRINTF("[MMC] switched to HS200\n");
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@ -435,7 +476,7 @@ static int _mmc_storage_enable_HS400(sdmmc_storage_t *storage)
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if (!_mmc_storage_enable_HS200(storage))
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return 0;
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sdmmc_get_venclkctl(storage->sdmmc);
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sdmmc_set_tap_value(storage->sdmmc);
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if (!_mmc_storage_enable_HS(storage, 0))
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return 0;
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@ -446,7 +487,7 @@ static int _mmc_storage_enable_HS400(sdmmc_storage_t *storage)
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if (!_mmc_storage_switch(storage, SDMMC_SWITCH(MMC_SWITCH_MODE_WRITE_BYTE, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400)))
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return 0;
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if (!sdmmc_setup_clock(storage->sdmmc, 4))
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if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_HS400))
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return 0;
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DPRINTF("[MMC] switched to HS400\n");
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@ -457,22 +498,20 @@ DPRINTF("[MMC] switched to HS400\n");
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static int _mmc_storage_enable_highspeed(sdmmc_storage_t *storage, u32 card_type, u32 type)
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{
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//TODO: this should be a config item.
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// --v
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if (!1 || sdmmc_get_voltage(storage->sdmmc) != SDMMC_POWER_1_8)
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if (sdmmc_get_io_power(storage->sdmmc) != SDMMC_POWER_1_8)
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goto out;
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if (sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_8 &&
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card_type & EXT_CSD_CARD_TYPE_HS400_1_8V && type == 4)
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card_type & EXT_CSD_CARD_TYPE_HS400_1_8V && type == SDHCI_TIMING_MMC_HS400)
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return _mmc_storage_enable_HS400(storage);
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if (sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_8 ||
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(sdmmc_get_bus_width(storage->sdmmc) == SDMMC_BUS_WIDTH_4
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&& card_type & EXT_CSD_CARD_TYPE_HS200_1_8V
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&& (type == 4 || type == 3)))
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&& (type == SDHCI_TIMING_MMC_HS400 || type == SDHCI_TIMING_MMC_HS200)))
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return _mmc_storage_enable_HS200(storage);
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out:;
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out:
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if (card_type & EXT_CSD_CARD_TYPE_HS_52)
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return _mmc_storage_enable_HS(storage, 1);
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@ -487,13 +526,13 @@ static int _mmc_storage_enable_bkops(sdmmc_storage_t *storage)
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return _sdmmc_storage_check_status(storage);
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}
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int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type)
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int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type)
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{
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memset(storage, 0, sizeof(sdmmc_storage_t));
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storage->sdmmc = sdmmc;
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storage->rca = 2; //TODO: this could be a config item.
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if (!sdmmc_init(sdmmc, id, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_1, 0, 0))
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if (!sdmmc_init(sdmmc, SDMMC_4, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_1, SDHCI_TIMING_MMC_ID, SDMMC_AUTO_CAL_DISABLE))
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return 0;
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DPRINTF("[MMC] after init\n");
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@ -520,7 +559,7 @@ DPRINTF("[MMC] set relative addr\n");
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DPRINTF("[MMC] got csd\n");
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_mmc_storage_parse_csd(storage);
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if (!sdmmc_setup_clock(storage->sdmmc, 1))
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if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_MMC_LS26))
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return 0;
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DPRINTF("[MMC] after setup clock\n");
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@ -544,35 +583,27 @@ DPRINTF("[MMC] set blocklen to 512\n");
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return 0;
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DPRINTF("[MMC] switched buswidth\n");
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u8 *ext_csd = (u8 *)malloc(512);
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if (!_mmc_storage_get_ext_csd(storage, ext_csd))
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{
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free(ext_csd);
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if (!_mmc_storage_get_ext_csd(storage, (u8 *)SDMMC_UPPER_BUFFER))
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return 0;
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}
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free(ext_csd);
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DPRINTF("[MMC] got ext_csd\n");
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_mmc_storage_parse_cid(storage); //This needs to be after csd and ext_csd
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//gfx_hexdump(0, ext_csd, 512);
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/* When auto BKOPS is enabled the mmc device should be powered all the time until we disable this and check status.
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Disable it for now until BKOPS disable added to power down sequence at sdmmc_storage_end().
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Additionally this works only when we put the device in idle mode which we don't after enabling it. */
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if (storage->ext_csd.bkops & 0x1 && !(storage->ext_csd.bkops_en & EXT_CSD_BKOPS_LEVEL_2) && 0)
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if (0 && storage->ext_csd.bkops & 0x1 && !(storage->ext_csd.bkops_en & EXT_CSD_BKOPS_LEVEL_2))
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{
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_mmc_storage_enable_bkops(storage);
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DPRINTF("[MMC] BKOPS enabled\n");
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}
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else
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{
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DPRINTF("[MMC] BKOPS disabled\n");
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}
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if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
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return 0;
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DPRINTF("[MMC] succesfully switched to HS mode\n");
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sdmmc_sd_clock_ctrl(storage->sdmmc, 1);
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sdmmc_card_clock_ctrl(storage->sdmmc, SDMMC_AUTO_CAL_ENABLE);
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return 1;
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}
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@ -656,6 +687,7 @@ static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, i
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if (cond & SD_OCR_CCS)
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storage->has_sector_access = 1;
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// Check if card supports 1.8V signaling.
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if (cond & SD_ROCR_S18A && supports_low_voltage)
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{
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//The low voltage regulator configuration is valid for SDMMC1 only.
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@ -804,34 +836,37 @@ int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group,
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return _sdmmc_storage_check_result(tmp);
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}
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u8 *buf)
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u16 current_limit, u8 *buf)
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{
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u32 pwr = SD_SET_CURRENT_LIMIT_800;
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u32 pwr = SD_SET_CURRENT_LIMIT_200;
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if (current_limit & SD_MAX_CURRENT_800)
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pwr = SD_SET_CURRENT_LIMIT_800;
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else if (current_limit & SD_MAX_CURRENT_600)
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pwr = SD_SET_CURRENT_LIMIT_600;
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else if (current_limit & SD_MAX_CURRENT_400)
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pwr = SD_SET_CURRENT_LIMIT_400;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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while (pwr > 0)
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if (((buf[15] >> 4) & 0x0F) == pwr)
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{
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pwr--;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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if (((buf[15] >> 4) & 0x0F) == pwr)
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switch (pwr)
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{
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case SD_SET_CURRENT_LIMIT_800:
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DPRINTF("[SD] power limit raised to 800mA\n");
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break;
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}
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switch (pwr)
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{
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case SD_SET_CURRENT_LIMIT_800:
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DPRINTF("[SD] power limit raised to 800mA\n");
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break;
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case SD_SET_CURRENT_LIMIT_600:
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case SD_SET_CURRENT_LIMIT_600:
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DPRINTF("[SD] power limit raised to 600mA\n");
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break;
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case SD_SET_CURRENT_LIMIT_400:
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DPRINTF("[SD] power limit raised to 800mA\n");
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break;
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default:
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case SD_SET_CURRENT_LIMIT_200:
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break;
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case SD_SET_CURRENT_LIMIT_400:
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DPRINTF("[SD] power limit raised to 400mA\n");
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break;
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default:
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case SD_SET_CURRENT_LIMIT_200:
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DPRINTF("[SD] power limit defaulted to 200mA\n");
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break;
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break;
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}
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}
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}
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@ -839,30 +874,33 @@ int _sd_storage_enable_highspeed(sdmmc_storage_t *storage, u32 hs_type, u8 *buf)
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{
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if (!_sd_storage_switch(storage, buf, SD_SWITCH_CHECK, 0, hs_type))
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return 0;
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DPRINTF("[SD] SD supports switch to (U)HS check\n");
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DPRINTF("[SD] supports switch to (U)HS mode\n");
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u32 type_out = buf[16] & 0xF;
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if (type_out != hs_type)
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return 0;
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DPRINTF("[SD] SD supports selected (U)HS mode\n");
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DPRINTF("[SD] supports selected (U)HS mode\n");
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if ((((u16)buf[0] << 8) | buf[1]) < 0x320)
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u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1];
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DPRINTF("[SD] total max current: %d\n", total_pwr_consumption);
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if (total_pwr_consumption <= 800)
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{
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if (!_sd_storage_switch(storage, buf, SD_SWITCH_SET, 0, hs_type))
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return 0;
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if (type_out != (buf[16] & 0xF))
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return 0;
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}
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return 1;
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return 1;
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}
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DPRINTF("[SD] card max current over limit\n");
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return 0;
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}
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int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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{
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, buf);
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if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4)
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return 0;
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@ -870,32 +908,55 @@ int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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return 0;
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//gfx_hexdump(0, (u8 *)buf, 64);
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u8 access_mode = buf[13];
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u16 current_limit = buf[7] | buf[6] << 8;
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, current_limit, buf);
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u32 hs_type = 0;
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switch (type)
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{
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case 11: // SDR104.
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case SDHCI_TIMING_UHS_SDR104:
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case SDHCI_TIMING_UHS_SDR82:
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// Fall through if not supported.
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if (buf[13] & SD_MODE_UHS_SDR104)
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if (access_mode & SD_MODE_UHS_SDR104)
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{
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type = 11;
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hs_type = UHS_SDR104_BUS_SPEED;
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DPRINTF("[SD] bus speed set to SDR104\n");
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storage->csd.busspeed = 104;
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switch (type)
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{
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case SDHCI_TIMING_UHS_SDR104:
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storage->csd.busspeed = 104;
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break;
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case SDHCI_TIMING_UHS_SDR82:
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storage->csd.busspeed = 82;
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break;
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}
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break;
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}
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case 10: // SDR50.
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if (buf[13] & SD_MODE_UHS_SDR50)
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case SDHCI_TIMING_UHS_SDR50:
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if (access_mode & SD_MODE_UHS_SDR50)
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{
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type = 10;
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type = SDHCI_TIMING_UHS_SDR50;
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hs_type = UHS_SDR50_BUS_SPEED;
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DPRINTF("[SD] bus speed set to SDR50\n");
|
||||
storage->csd.busspeed = 50;
|
||||
break;
|
||||
}
|
||||
case 8: // SDR12.
|
||||
if (!(buf[13] & SD_MODE_UHS_SDR12))
|
||||
case SDHCI_TIMING_UHS_SDR25:
|
||||
if (access_mode & SD_MODE_UHS_SDR25)
|
||||
{
|
||||
type = SDHCI_TIMING_UHS_SDR25;
|
||||
hs_type = UHS_SDR50_BUS_SPEED;
|
||||
DPRINTF("[SD] bus speed set to SDR25\n");
|
||||
storage->csd.busspeed = 25;
|
||||
break;
|
||||
}
|
||||
case SDHCI_TIMING_UHS_SDR12:
|
||||
if (!(access_mode & SD_MODE_UHS_SDR12))
|
||||
return 0;
|
||||
type = 8;
|
||||
type = SDHCI_TIMING_UHS_SDR12;
|
||||
hs_type = UHS_SDR12_BUS_SPEED;
|
||||
DPRINTF("[SD] bus speed set to SDR12\n");
|
||||
storage->csd.busspeed = 12;
|
||||
|
|
@ -907,11 +968,11 @@ DPRINTF("[SD] bus speed set to SDR12\n");
|
|||
|
||||
if (!_sd_storage_enable_highspeed(storage, hs_type, buf))
|
||||
return 0;
|
||||
DPRINTF("[SD] SD card accepted UHS\n");
|
||||
DPRINTF("[SD] card accepted UHS\n");
|
||||
if (!sdmmc_setup_clock(storage->sdmmc, type))
|
||||
return 0;
|
||||
DPRINTF("[SD] setup clock\n");
|
||||
if (!sdmmc_config_tuning(storage->sdmmc, type, MMC_SEND_TUNING_BLOCK))
|
||||
if (!sdmmc_tuning_execute(storage->sdmmc, type, MMC_SEND_TUNING_BLOCK))
|
||||
return 0;
|
||||
DPRINTF("[SD] config tuning\n");
|
||||
return _sdmmc_storage_check_status(storage);
|
||||
|
|
@ -922,16 +983,23 @@ int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
|
|||
if (!_sd_storage_switch_get(storage, buf))
|
||||
return 0;
|
||||
//gfx_hexdump(0, (u8 *)buf, 64);
|
||||
if (!(buf[13] & SD_MODE_HIGH_SPEED))
|
||||
|
||||
u8 access_mode = buf[13];
|
||||
u16 current_limit = buf[7] | buf[6] << 8;
|
||||
|
||||
// Try to raise the current limit to let the card perform better.
|
||||
_sd_storage_set_current_limit(storage, current_limit, buf);
|
||||
|
||||
if (!(access_mode & SD_MODE_HIGH_SPEED))
|
||||
return 1;
|
||||
|
||||
if (!_sd_storage_enable_highspeed(storage, 1, buf))
|
||||
if (!_sd_storage_enable_highspeed(storage, HIGH_SPEED_BUS_SPEED, buf))
|
||||
return 0;
|
||||
|
||||
if (!_sdmmc_storage_check_status(storage))
|
||||
return 0;
|
||||
|
||||
return sdmmc_setup_clock(storage->sdmmc, 7);
|
||||
return sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_SD_HS25);
|
||||
}
|
||||
|
||||
static void _sd_storage_parse_ssr(sdmmc_storage_t *storage)
|
||||
|
|
@ -1055,6 +1123,23 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
|
|||
}
|
||||
}
|
||||
|
||||
static bool _sdmmc_storage_supports_low_voltage(u32 bus_width, u32 type)
|
||||
{
|
||||
switch (type)
|
||||
{
|
||||
case SDHCI_TIMING_UHS_SDR12:
|
||||
case SDHCI_TIMING_UHS_SDR25:
|
||||
case SDHCI_TIMING_UHS_SDR50:
|
||||
case SDHCI_TIMING_UHS_SDR104:
|
||||
case SDHCI_TIMING_UHS_SDR82:
|
||||
case SDHCI_TIMING_UHS_DDR50:
|
||||
if (bus_width == SDMMC_BUS_WIDTH_4)
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
void sdmmc_storage_init_wait_sd()
|
||||
{
|
||||
u32 sd_poweroff_time = (u32)get_tmr_ms() - sd_power_cycle_time_start;
|
||||
|
|
@ -1062,7 +1147,7 @@ void sdmmc_storage_init_wait_sd()
|
|||
msleep(100 - sd_poweroff_time);
|
||||
}
|
||||
|
||||
int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type)
|
||||
int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type)
|
||||
{
|
||||
int is_version_1 = 0;
|
||||
u8 *buf = (u8 *)SDMMC_UPPER_BUFFER;
|
||||
|
|
@ -1073,7 +1158,7 @@ int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32
|
|||
memset(storage, 0, sizeof(sdmmc_storage_t));
|
||||
storage->sdmmc = sdmmc;
|
||||
|
||||
if (!sdmmc_init(sdmmc, id, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, 5, 0))
|
||||
if (!sdmmc_init(sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, SDHCI_TIMING_SD_ID, SDMMC_AUTO_CAL_DISABLE))
|
||||
return 0;
|
||||
DPRINTF("[SD] after init\n");
|
||||
|
||||
|
|
@ -1088,7 +1173,9 @@ DPRINTF("[SD] went to idle state\n");
|
|||
return 0;
|
||||
DPRINTF("[SD] after send if cond\n");
|
||||
|
||||
if (!_sd_storage_get_op_cond(storage, is_version_1, bus_width == SDMMC_BUS_WIDTH_4 && type == 11))
|
||||
bool supports_low_voltage = _sdmmc_storage_supports_low_voltage(bus_width, type);
|
||||
|
||||
if (!_sd_storage_get_op_cond(storage, is_version_1, supports_low_voltage))
|
||||
return 0;
|
||||
DPRINTF("[SD] got op cond\n");
|
||||
|
||||
|
|
@ -1122,7 +1209,7 @@ DPRINTF("[SD] unknown CSD structure %d\n", storage->csd.structure);
|
|||
|
||||
if (!storage->is_low_voltage)
|
||||
{
|
||||
if (!sdmmc_setup_clock(storage->sdmmc, 6))
|
||||
if (!sdmmc_setup_clock(storage->sdmmc, SDHCI_TIMING_SD_DS12))
|
||||
return 0;
|
||||
DPRINTF("[SD] after setup clock\n");
|
||||
}
|
||||
|
|
@ -1165,18 +1252,26 @@ DPRINTF("[SD] SD does not support wide bus width\n");
|
|||
if (!_sd_storage_enable_uhs_low_volt(storage, type, buf))
|
||||
return 0;
|
||||
DPRINTF("[SD] enabled UHS\n");
|
||||
|
||||
sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
|
||||
}
|
||||
else if (type != 6 && (storage->scr.sda_vsn & 0xF) != 0)
|
||||
else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF) != 0)
|
||||
{
|
||||
if (!_sd_storage_enable_hs_high_volt(storage, buf))
|
||||
return 0;
|
||||
|
||||
DPRINTF("[SD] enabled HS\n");
|
||||
storage->csd.busspeed = 25;
|
||||
switch (bus_width)
|
||||
{
|
||||
case SDMMC_BUS_WIDTH_4:
|
||||
storage->csd.busspeed = 25;
|
||||
break;
|
||||
case SDMMC_BUS_WIDTH_1:
|
||||
storage->csd.busspeed = 6;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
sdmmc_sd_clock_ctrl(sdmmc, 1);
|
||||
|
||||
// Parse additional card info from sd status.
|
||||
if (_sd_storage_get_ssr(storage, buf))
|
||||
{
|
||||
|
|
@ -1222,17 +1317,17 @@ int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc)
|
|||
memset(storage, 0, sizeof(sdmmc_storage_t));
|
||||
storage->sdmmc = sdmmc;
|
||||
|
||||
if (!sdmmc_init(sdmmc, SDMMC_2, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_8, 14, 0))
|
||||
if (!sdmmc_init(sdmmc, SDMMC_2, SDMMC_POWER_1_8, SDMMC_BUS_WIDTH_8, SDHCI_TIMING_MMC_DDR52, SDMMC_AUTO_CAL_DISABLE))
|
||||
return 0;
|
||||
DPRINTF("[gc] after init\n");
|
||||
|
||||
usleep(1000 + (10000 + sdmmc->divisor - 1) / sdmmc->divisor);
|
||||
|
||||
if (!sdmmc_config_tuning(storage->sdmmc, 14, MMC_SEND_TUNING_BLOCK_HS200))
|
||||
if (!sdmmc_tuning_execute(storage->sdmmc, SDHCI_TIMING_MMC_DDR52, MMC_SEND_TUNING_BLOCK_HS200))
|
||||
return 0;
|
||||
DPRINTF("[gc] after tuning\n");
|
||||
|
||||
sdmmc_sd_clock_ctrl(sdmmc, 1);
|
||||
sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue