Merge interim hekate bugfixes
This commit is contained in:
parent
04d989a345
commit
e1ffda6ab9
36 changed files with 549 additions and 859 deletions
|
@ -25,11 +25,7 @@
|
|||
#include "power/max77620.h"
|
||||
#include "rtc/max77620-rtc.h"
|
||||
#include "soc/hw_init.h"
|
||||
#include "soc/i2c.h"
|
||||
#include "soc/pmc.h"
|
||||
#include "soc/t210.h"
|
||||
#include "storage/sdmmc.h"
|
||||
#include "utils/btn.h"
|
||||
#include "utils/util.h"
|
||||
|
||||
#include "keys/keys.h"
|
||||
|
@ -39,7 +35,7 @@ sdmmc_storage_t sd_storage;
|
|||
FATFS sd_fs;
|
||||
static bool sd_mounted;
|
||||
|
||||
boot_cfg_t *b_cfg;
|
||||
boot_cfg_t __attribute__((section ("._boot_cfg"))) b_cfg;
|
||||
|
||||
bool sd_mount()
|
||||
{
|
||||
|
@ -117,96 +113,53 @@ int sd_save_to_file(void *buf, u32 size, const char *filename)
|
|||
return 1;
|
||||
}
|
||||
|
||||
f_sync(&fp);
|
||||
f_write(&fp, buf, size, NULL);
|
||||
f_close(&fp);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void panic(u32 val)
|
||||
{
|
||||
// Set panic code.
|
||||
PMC(APBDEV_PMC_SCRATCH200) = val;
|
||||
//PMC(APBDEV_PMC_CRYPTO_OP) = 1; // Disable SE.
|
||||
TMR(TIMER_WDT4_UNLOCK_PATTERN) = TIMER_MAGIC_PTRN;
|
||||
TMR(TIMER_TMR9_TMR_PTV) = TIMER_EN | TIMER_PER_EN;
|
||||
TMR(TIMER_WDT4_CONFIG) = TIMER_SRC(9) | TIMER_PER(1) | TIMER_PMCRESET_EN;
|
||||
TMR(TIMER_WDT4_COMMAND) = TIMER_START_CNT;
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
void reboot_normal()
|
||||
{
|
||||
sd_unmount();
|
||||
display_end();
|
||||
panic(0x21); // Bypass fuse programming in package1.
|
||||
}
|
||||
|
||||
void reboot_rcm()
|
||||
{
|
||||
sd_unmount();
|
||||
display_end();
|
||||
PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
|
||||
PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
|
||||
while (true)
|
||||
usleep(1);
|
||||
}
|
||||
|
||||
void power_off()
|
||||
{
|
||||
sd_unmount();
|
||||
max77620_rtc_stop_alarm();
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
|
||||
}
|
||||
|
||||
// This is a safe and unused DRAM region for our payloads.
|
||||
// IPL_LOAD_ADDR is defined in makefile.
|
||||
#define EXT_PAYLOAD_ADDR 0xC03C0000
|
||||
#define PATCHED_RELOC_SZ 0x94
|
||||
#define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10))
|
||||
#define PAYLOAD_ENTRY 0x40010000
|
||||
#define CBFS_SDRAM_EN_ADDR 0x4003e000
|
||||
#define COREBOOT_ADDR (0xD0000000 - 0x100000)
|
||||
|
||||
void (*ext_payload_ptr)() = (void *)EXT_PAYLOAD_ADDR;
|
||||
void (*update_ptr)() = (void *)RCM_PAYLOAD_ADDR;
|
||||
#define RELOC_META_OFF 0x7C
|
||||
#define PATCHED_RELOC_SZ 0x94
|
||||
#define PATCHED_RELOC_STACK 0x40007000
|
||||
#define COREBOOT_ADDR (0xD0000000 - 0x100000)
|
||||
#define CBFS_DRAM_EN_ADDR 0x4003e000
|
||||
#define CBFS_DRAM_MAGIC 0x4452414D // "DRAM"
|
||||
|
||||
void reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size)
|
||||
{
|
||||
static const u32 START_OFF = 0x7C;
|
||||
static const u32 STACK_OFF = 0x80;
|
||||
static const u32 PAYLOAD_END_OFF = 0x84;
|
||||
static const u32 IPL_START_OFF = 0x88;
|
||||
memcpy((u8 *)payload_src, (u8 *)IPL_LOAD_ADDR, PATCHED_RELOC_SZ);
|
||||
|
||||
memcpy((u8 *)payload_src, (u8 *)IPL_LOAD_ADDR, PATCHED_RELOC_SZ);
|
||||
volatile reloc_meta_t *relocator = (reloc_meta_t *)(payload_src + RELOC_META_OFF);
|
||||
|
||||
*(vu32 *)(payload_src + START_OFF) = payload_dst - ALIGN(PATCHED_RELOC_SZ, 0x10);
|
||||
*(vu32 *)(payload_src + PAYLOAD_END_OFF) = payload_dst + payload_size;
|
||||
*(vu32 *)(payload_src + STACK_OFF) = 0x40008000;
|
||||
*(vu32 *)(payload_src + IPL_START_OFF) = payload_dst;
|
||||
relocator->start = payload_dst - ALIGN(PATCHED_RELOC_SZ, 0x10);
|
||||
relocator->stack = PATCHED_RELOC_STACK;
|
||||
relocator->end = payload_dst + payload_size;
|
||||
relocator->ep = payload_dst;
|
||||
|
||||
if (payload_size == 0x7000)
|
||||
{
|
||||
memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), (u8 *)COREBOOT_ADDR, 0x7000); //Bootblock
|
||||
*(vu32 *)CBFS_SDRAM_EN_ADDR = 0x4452414D;
|
||||
}
|
||||
if (payload_size == 0x7000)
|
||||
{
|
||||
memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), (u8 *)COREBOOT_ADDR, 0x7000); //Bootblock
|
||||
*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
|
||||
}
|
||||
}
|
||||
|
||||
#define IPL_STACK_TOP 0x4003F000
|
||||
#define IPL_HEAP_START 0x90020000
|
||||
|
||||
extern void pivot_stack(u32 stack_top);
|
||||
|
||||
void ipl_main() {
|
||||
b_cfg = (boot_cfg_t *)(IPL_LOAD_ADDR + PATCHED_RELOC_SZ);
|
||||
|
||||
config_hw();
|
||||
pivot_stack(0x4003F000);
|
||||
heap_init(0x90020000);
|
||||
pivot_stack(IPL_STACK_TOP);
|
||||
heap_init(IPL_HEAP_START);
|
||||
|
||||
display_init();
|
||||
u32 *fb = display_init_framebuffer();
|
||||
gfx_init_ctxt(&gfx_ctxt, fb, 720, 1280, 720);
|
||||
gfx_con_init(&gfx_con, &gfx_ctxt);
|
||||
gfx_init_ctxt(fb, 720, 1280, 720);
|
||||
gfx_con_init();
|
||||
display_backlight_pwm_init();
|
||||
|
||||
sd_mount();
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue