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https://github.com/Decscots/Lockpick_RCM.git
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Update to hekate bdk 5.5.6
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parent
93909f149e
commit
a7712b173c
95 changed files with 2720 additions and 1684 deletions
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@ -60,7 +60,7 @@ u32 minerva_init()
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mtc_config_t mtc_tmp;
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mtc_tmp.mtc_table = mtc_cfg->mtc_table;
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.sdram_id = fuse_read_dramid(false);
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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@ -81,7 +81,7 @@ u32 minerva_init()
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// Set table to nyx storage.
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mtc_cfg->mtc_table = (emc_table_t *)nyx_str->mtc_table;
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->sdram_id = fuse_read_dramid(false);
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mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
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u32 ep_addr = ianos_loader("bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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@ -104,21 +104,21 @@ u32 minerva_init()
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}
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mtc_cfg->rate_from = mtc_cfg->mtc_table[curr_ram_idx].rate_khz;
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mtc_cfg->rate_to = 204000;
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mtc_cfg->rate_to = FREQ_204;
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mtc_cfg->train_mode = OP_TRAIN;
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minerva_cfg(mtc_cfg, NULL);
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mtc_cfg->rate_to = 800000;
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mtc_cfg->rate_to = FREQ_800;
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minerva_cfg(mtc_cfg, NULL);
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mtc_cfg->rate_to = 1600000;
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mtc_cfg->rate_to = FREQ_1600;
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minerva_cfg(mtc_cfg, NULL);
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// FSP WAR.
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mtc_cfg->train_mode = OP_SWITCH;
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mtc_cfg->rate_to = 800000;
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mtc_cfg->rate_to = FREQ_800;
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minerva_cfg(mtc_cfg, NULL);
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// Switch to max.
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mtc_cfg->rate_to = 1600000;
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mtc_cfg->rate_to = FREQ_1600;
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minerva_cfg(mtc_cfg, NULL);
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return 0;
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@ -129,6 +129,7 @@ void minerva_change_freq(minerva_freq_t freq)
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if (!minerva_cfg)
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return;
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// Check if requested frequency is different. Do not allow otherwise because it will hang.
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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if (mtc_cfg->rate_from != freq)
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{
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@ -138,6 +139,23 @@ void minerva_change_freq(minerva_freq_t freq)
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}
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}
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void minerva_prep_boot_freq()
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{
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if (!minerva_cfg)
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return;
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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// Check if there's RAM OC. If not exit.
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if (mtc_cfg->mtc_table[mtc_cfg->table_entries - 1].rate_khz == FREQ_1600)
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return;
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// FSP WAR.
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minerva_change_freq(FREQ_204);
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// Scale down to 800 MHz boot freq.
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minerva_change_freq(FREQ_800);
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}
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void minerva_periodic_training()
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{
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if (!minerva_cfg)
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