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https://github.com/Decscots/Lockpick_RCM.git
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Update to hekate bdk 5.6.0
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shchmue
parent
a89e9b4d7f
commit
f2f3c5daf0
43 changed files with 1530 additions and 1533 deletions
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2020 CTCaer
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* Copyright (c) 2018-2021 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -547,17 +547,17 @@
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#define MIPI_DCS_GET_DISPLAY_ID1 0xDA // GET_DISPLAY_ID Byte0, Module Manufacturer ID.
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#define MIPI_DCS_GET_DISPLAY_ID2 0xDB // GET_DISPLAY_ID Byte1, Module/Driver Version ID.
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#define MIPI_DCS_GET_DISPLAY_ID3 0xDC // GET_DISPLAY_ID Byte2, Module/Driver ID.
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#define MIPI_DCS_GET_NUM_ERRORS 0x05
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#define MIPI_DCS_GET_NUM_ERRORS 0x05 // 1 byte.
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#define MIPI_DCS_GET_RED_CHANNEL 0x06
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#define MIPI_DCS_GET_GREEN_CHANNEL 0x07
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#define MIPI_DCS_GET_BLUE_CHANNEL 0x08
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#define MIPI_DCS_GET_DISPLAY_STATUS 0x09
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#define MIPI_DCS_GET_POWER_MODE 0x0A
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#define MIPI_DCS_GET_ADDRESS_MODE 0x0B
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#define MIPI_DCS_GET_PIXEL_FORMAT 0x0C
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#define MIPI_DCS_GET_DISPLAY_MODE 0x0D
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#define MIPI_DCS_GET_SIGNAL_MODE 0x0E
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#define MIPI_DCS_GET_DIAGNOSTIC_RESULT 0x0F
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#define MIPI_DCS_GET_DISPLAY_STATUS 0x09 // 4 bytes.
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#define MIPI_DCS_GET_POWER_MODE 0x0A // 1 byte. 2: DISON, 3: NORON, 4: SLPOUT, 7: BSTON.
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#define MIPI_DCS_GET_ADDRESS_MODE 0x0B // Display Access Control. 1 byte. 0: GS, 1: SS, 3: BGR.
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#define MIPI_DCS_GET_PIXEL_FORMAT 0x0C // 1 byte. 4-6: DPI.
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#define MIPI_DCS_GET_DISPLAY_MODE 0x0D // 1 byte. 0-2: GCS, 3: ALLPOFF, 4: ALLPON, 5: INVON.
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#define MIPI_DCS_GET_SIGNAL_MODE 0x0E // 1 byte. 0: EODSI, 2: DEON, 3: PCLKON, 4: VSON, 5: HSON, 7: TEON.
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#define MIPI_DCS_GET_DIAGNOSTIC_RESULT 0x0F // 1 byte. 6: FUNDT, 7: REGLD.
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#define MIPI_DCS_ENTER_SLEEP_MODE 0x10
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#define MIPI_DCS_EXIT_SLEEP_MODE 0x11
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#define MIPI_DCS_ENTER_PARTIAL_MODE 0x12
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@ -567,7 +567,7 @@
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#define MIPI_DCS_ALL_PIXELS_OFF 0x22
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#define MIPI_DCS_ALL_PIXELS_ON 0x23
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#define MIPI_DCS_SET_CONTRAST 0x25 // VCON in 40mV steps. 7-bit integer.
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#define MIPI_DCS_SET_GAMMA_CURVE 0x26
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#define MIPI_DCS_SET_GAMMA_CURVE 0x26 // 1 byte. 0-7: GC.
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#define MIPI_DCS_SET_DISPLAY_OFF 0x28
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#define MIPI_DCS_SET_DISPLAY_ON 0x29
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#define MIPI_DCS_SET_COLUMN_ADDRESS 0x2A
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@ -580,11 +580,11 @@
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#define MIPI_DCS_SET_SCROLL_AREA 0x33
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#define MIPI_DCS_SET_TEAR_OFF 0x34
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#define MIPI_DCS_SET_TEAR_ON 0x35
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#define MIPI_DCS_SET_ADDRESS_MODE 0x36
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#define MIPI_DCS_SET_ADDRESS_MODE 0x36 // Display Access Control. 1 byte. 0: GS, 1: SS, 3: BGR.
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#define MIPI_DCS_SET_SCROLL_START 0x37
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#define MIPI_DCS_EXIT_IDLE_MODE 0x38
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#define MIPI_DCS_ENTER_IDLE_MODE 0x39
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#define MIPI_DCS_SET_PIXEL_FORMAT 0x3A
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#define MIPI_DCS_SET_PIXEL_FORMAT 0x3A // 1 byte. 4-6: DPI.
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#define MIPI_DCS_WRITE_MEMORY_CONTINUE 0x3C
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#define MIPI_DCS_READ_MEMORY_CONTINUE 0x3E
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#define MIPI_DCS_GET_3D_CONTROL 0x3F
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@ -593,26 +593,34 @@
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#define MIPI_DCS_GET_SCANLINE 0x45
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#define MIPI_DCS_SET_TEAR_SCANLINE_WIDTH 0x46
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#define MIPI_DCS_GET_SCANLINE_WIDTH 0x47
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#define MIPI_DCS_SET_BRIGHTNESS 0x51 // DCS_CONTROL_DISPLAY_BRIGHTNESS_CTRL.
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#define MIPI_DCS_GET_BRIGHTNESS 0x52
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#define MIPI_DCS_SET_CONTROL_DISPLAY 0x53
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#define MIPI_DCS_GET_CONTROL_DISPLAY 0x54
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#define MIPI_DCS_SET_CABC_VALUE 0x55
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#define MIPI_DCS_GET_CABC_VALUE 0x56
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#define MIPI_DCS_SET_CABC_MIN_BRI 0x5E
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#define MIPI_DCS_GET_CABC_MIN_BRI 0x5F
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#define MIPI_DCS_SET_BRIGHTNESS 0x51 // DCS_CONTROL_DISPLAY_BRIGHTNESS_CTRL. 1 byte. 0-7: DBV.
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#define MIPI_DCS_GET_BRIGHTNESS 0x52 // 1 byte. 0-7: DBV.
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#define MIPI_DCS_SET_CONTROL_DISPLAY 0x53 // 1 byte. 2: BL, 3: DD, 5: BCTRL.
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#define MIPI_DCS_GET_CONTROL_DISPLAY 0x54 // 1 byte. 2: BL, 3: DD, 5: BCTRL.
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#define MIPI_DCS_SET_CABC_VALUE 0x55 // 1 byte. 0-32: C, 4-7: C.
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#define MIPI_DCS_GET_CABC_VALUE 0x56 // 1 byte. 0-32: C, 4-7: C.
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#define MIPI_DCS_SET_CABC_MIN_BRI 0x5E // 1 byte. 0-7: CMB.
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#define MIPI_DCS_GET_CABC_MIN_BRI 0x5F // 1 byte. 0-7: CMB.
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#define MIPI_DCS_GET_AUTO_BRI_DIAG_RES 0x68 // 1 byte. 6-7: D.
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#define MIPI_DCS_READ_DDB_START 0xA1
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#define MIPI_DCS_READ_DDB_CONTINUE 0xA8
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#define MIPI_DCS_READ_DDB_CONTINUE 0xA8 // 0x100 size.
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/*! MIPI DCS Panel Private CMDs. */
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#define MIPI_DCS_PRIV_UNK_A0 0xA0
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#define MIPI_DCS_PRIV_SET_POWER_CONTROL 0xB1
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#define MIPI_DCS_PRIV_SET_EXTC 0xB9
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#define MIPI_DCS_PRIV_SET_EXTC 0xB9 // Enable extended commands.
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#define MIPI_DCS_PRIV_UNK_BD 0xBD
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#define MIPI_DCS_PRIV_UNK_D5 0xD5
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#define MIPI_DCS_PRIV_UNK_D6 0xD6
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#define MIPI_DCS_PRIV_UNK_D8 0xD8
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#define MIPI_DCS_PRIV_UNK_D9 0xD9
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#define MIPI_DCS_PRIV_READ_EXTC_CMD_SPI 0xFE // Read EXTC Command In SPI. 1 byte. 0-6: EXT_SPI_CNT, 7:EXT_SP.
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#define MIPI_DCS_PRIV_SET_EXTC_CMD_REG 0xFF // EXTC Command Set enable register. 5 bytes. Pass: FF 98 06 04, PAGE.
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/*! MIPI DCS Panel Private CMDs PAGE 1. */
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#define MIPI_DCS_PRIV_GET_DISPLAY_ID4 0x00
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#define MIPI_DCS_PRIV_GET_DISPLAY_ID5 0x01
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#define MIPI_DCS_PRIV_GET_DISPLAY_ID6 0x02
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/*! MIPI DCS CMD Defines. */
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#define DCS_POWER_MODE_DISPLAY_ON BIT(2)
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@ -655,11 +663,15 @@
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* [20] 98 [0F]: InnoLux P062CCA-??? [UNCONFIRMED MODEL REV]
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* [30] 94 [0F]: AUO A062TAN01 (59.06A33.001)
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* [30] 95 [0F]: AUO A062TAN02 (59.06A33.002)
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* [30] XX [0F]: AUO A062TAN03 (59.06A33.003) [UNCONFIRMED ID]
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*
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* 5.5" panels for Hoag skus:
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* [20] 94 [10]: InnoLux 2J055IA-27A (Rev B1)
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* [30] XX [10]: AUO A055TAN01 (59.05A30.001) [UNCONFIRMED ID]
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* [30] 93 [10]: AUO A055TAN01 (59.05A30.001)
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* [40] XX [10]: Vendor 40 [UNCONFIRMED ID]
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*
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* 7.0" OLED panels for Aula skus:
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* [50] XX [20]: Samsung AMS700XXXX [UNCONFIRMED ID and MODEL]
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*/
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/* Display ID Decoding:
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@ -672,13 +684,13 @@
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* 10h: Japan Display Inc.
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* 20h: InnoLux Corporation
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* 30h: AU Optronics
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* 40h: Unknown1
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* 50h: Unknown2 (OLED? Samsung? LG?)
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* 40h: Unknown0
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* 50h: Samsung
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*
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* Boards, Panel Size:
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* 0Fh: Icosa/Iowa, 6.2"
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* 10h: Hoag, 5.5"
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* 20h: Unknown, x.x"
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* 20h: Aula, 7.0"
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*/
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enum
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PANEL_AUO_A062TAN01 = 0x0F30,
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PANEL_INL_2J055IA_27A = 0x1020,
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PANEL_AUO_A055TAN01 = 0x1030,
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PANEL_V40_55_UNK = 0x1040
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PANEL_V40_55_UNK = 0x1040,
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PANEL_SAM_70_UNK = 0x2050
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};
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void display_init();
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